Embodiments of the inventive concept relate generally to semiconductor memory devices, and more particularly to methods of controlling a read sequence of a nonvolatile memory device, as well as memory systems incorporating nonvolatile memory devices operated in this manner.
There are many different types of nonvolatile memory devices, wherein constituent memory cells operate according to different principles. For example, the memory cells of a flash memory device store data in relation to a plurality of threshold voltage distributions, while memory cells of a resistive memory device store data in accordance with a plurality of resistance distributions. In either case, each respective “distribution” is assigned a corresponding logic state for stored data.
Once written (or programmed) to a nonvolatile memory cell, data may subsequently be read by determining whether a selected (or target) memory cell is turned ON or OFF when a particular read voltage is applied. Thus, one or more read voltage(s) will usually be defined in view of the distributions intended to characterize the stored data, and to which the constituent nonvolatile memory cells are programmed.
Unfortunately, during or after the programming of a memory cell, its intended distribution may become altered or distorted by a number of events or conditions including, for example charge leakage, program disturbances, read disturbances, word and/or bit line coupling, temperature change, voltage change, degeneration of the memory cell, etc. In extreme cases, an intended distribution may become so shifted and/or broadened that a “read fail” occurs.
When a read fail occurs, certain nonvolatile memory devices may execute a different type of read operation (i.e., one having a different read sequence) than the one causing the read fail. However, it is not easy to set a read sequence that properly accounts for the many events and conditions that might have altered the distributions being read. Accordingly, “read latency” (i.e., the period of time required to read stored data) may increase as changes in the current operating conditions are assessed or identified in terms of an acceptable read sequence, and performance of the nonvolatile memory device may be degraded with extension of its read latencies.